;********************************************************************** ; ultralite.asm * ; This file is code for a smart white LED lamp * ; on the PICmicro PIC16F627. See lightbar.dwg for cct. * ; see camper-lite.sch and camper-lite.brd * ; * ;********************************************************************** ; * ; Filename: ultra-lite.asm * ; Date: Feb 24, 2004 * ; File Version: beta test * ; tested on hardware * ; * ; Author: Lawrence Glaister VE7IT * ; Company: Glaister Consulting * ; * ;********************************************************************** ; * ; Files required: * ; p16f627.inc * ; * ; * ;********************************************************************** ; * ; Notes: * ; * ; - build using * ; assembler package found at * ; http://gputils.sourceforge.net/ or download page of * ; https://sourceforge.net/project/showfiles.php?group_id=41924 * * ; gpasm ultralite.asm * ; * ; * ; - burn using * ; pp627 ( a modified version of pp84 by L.P Glaister ) * ; pp627 ultralite .hex * ; * ;********************************************************************** list p=16f627, n=58, c=80 ; list directive to define processor radix dec #include ; processor specific variable definitions ; see page 96 of data sheet for description of config bits ; code protection off ; watch dog timer off ; brown out detection on ; power up timer enabled ; int rc osc (4mhz) with clk/4 on osc2 pin 15 ; master clear pin used as I/O ; low voltage programming off ; NOTE: rb4 pin 10 must be pulled low to be sure HVP mode will work. __CONFIG _CP_OFF & _WDT_OFF & _BODEN_ON & _PWRTE_ON & _INTRC_OSC_CLKOUT & _MCLRE_OFF & _LVP_OFF ; THESE 4 NIBBLES CAN BE USED FOR SOFTWARE VERSION NUMBER __idlocs H'F0AD' XTAL_FREQ equ 4000000 ; nominal clock freq in hz ;***** RAM LOCATION DEFINITIONS ; locations 70-7f are common to all 4 banks (no bank select issues) ; Bank 0 has 96 bytes of general purpose regs 20h-7fh (hi 16 are common to all banks) ; *** Bank0 *** 80 bytes 0x20 - 0x6f CBLOCK 0x020 bmode ; current mode selected by pushbutton ; 0 = lite level 1 ; 1 = lite level 2 ; 2 = lite level 3 ; 3 = off ; 4 = off temp ; local variable used by various routines delay1 off_timer ; used for auto off function off_timerh ; high order auto off timer ENDC ; *** Bank1 *** 80 bytes 0xA0 - 0xEF CBLOCK 0x0A0 ENDC ; *** Bank2 *** 48 Bytes 0x120 - 0x14f CBLOCK 0x120 ENDC ; *** Bank0/1/2/3 mirrored in all banks 0x70, 0xF0, 0x170, 0x1F0, 16 bytes CBLOCK 0x070 w_temp ; variable used for context saving status_temp ; variable used for context saving ENDC ; ****************** Macro definitions ******************************** ;+++++ ; PAGE/BANK0/1/2/3 selects register bank 0/1/2/3. ; Leave set to BANK0 normally. BANK0 MACRO BCF STATUS,RP0 ; clear bank select bits BCF STATUS,RP1 ; BCF STATUS,IRP ; clear indirect adressing bit ENDM BANK1 MACRO BSF STATUS,RP0 ; BCF STATUS,RP1 ; ; BCF STATUS,IRP ; clear indirect adressing bit ENDM BANK2 MACRO BCF STATUS,RP0 ; BSF STATUS,RP1 ; BSF STATUS,IRP ; set bit for indirect adressing ENDM BANK3 MACRO BSF STATUS,RP0 ; BSF STATUS,RP1 ; BSF STATUS,IRP ; set bit for indirect adressing ENDM ;********************************************************************** ;* Program description ;* ; on powerup, the processor examines the state of RA0 comparitor ; to decide if it has been a long time or a short time since last ; powerup. If its been a short time, then we increment the light ; output mode, else we restore last light output level. ; Low battery detection (about 11.5v) is enabled when rb7 jmp'd to gnd ; ;********************************************************************** ;********************************************************************** ORG 0x000 ; processor reset vector NOP ; required for the ICD CLRF STATUS ; ensure we are at bank0 CLRF PCLATH ; ensure page bits are cleared ( before GOTO xxx !!! ) goto start ; go to beginning of program ORG 0x004 ; interrupt vector location movwf w_temp ; save off current W register contents movf STATUS,W ; move status register into W register movwf status_temp ; save off contents of STATUS register ; isr code can go here or be located as a call subroutine elsewhere movf status_temp,W ; retrieve copy of STATUS register movwf STATUS ; restore pre-isr STATUS register contents swapf w_temp,F swapf w_temp,W ; restore pre-isr W register contents retfie ; return from interrupt start MOVLW B'11111111' ; PORT REGS TO DEFAULTS MOVWF PORTA MOVLW B'11111111' MOVWF PORTB call init_cmp1 ; setup comparators for input MOVLW B'00000111' ; B7: RBPU - ENABLE PORT B PULL-UP RES, 0=OFF ; B6: INTEDG - RB0 INT EDGE SEL 0=-VE ; B5: T0CS - TMR0 SOURCE, 0=FOSC/4, 1=RA4 PIN ; B4: T0SE - RA4CLK PIN EDGE SELECT, 0=+VE ; B3: PSA - PRESCALE ASSIGN 0=TIMER, 1=WDG ; B2-0: PS2-0 - PRESCALE RATE 111=256 FOR TIMER (=127 FOR WDT) ERRORLEVEL -306, -302 BSF STATUS,RP0 ; OPTION & TRIS & VRCON ARE IN BANK 1 MOVWF OPTION_REG ; set port B for 4 inputs (config jumpers) and 4 outputs ; rb3 is pwm output MOVLW B'11110000' ; 0=OUTPUT MOVWF TRISB ; set port A as inputs MOVLW B'11111111' ; 1=INPUT MOVWF TRISA BCF STATUS,RP0 ; BACK TO LO REGS ERRORLEVEL +306, +302 MOVLW B'00000000' ; B7: GIE - GLOBAL INT ENABLE, 0=OFF ; B6: EEIE - EERAW WRITE DONE INT ENABLE, 0=OFF ; B5: T0IE - TMR0 O/FLOW INT ENABLE, 0=OFF ; B4: INTE - RB0 INT ENABLE, 0=OFF ; B3: RBIE - PORTB CHANGE-OF-STATE INT ENABLE, 0=OFF ; B2: T0IF - TMR0 O'FLOW FLAG, 1=O/FLOW, S/WARE MUST RESET ; B1: INTF - RB0 INT FLAG, ACTIVE HIGH ; B0: RBIF - PORTB CHANGE-OF-STATE FLAG, ACTIVE HIGH MOVWF INTCON call init_timer1 call init_pwm1 ; init any i/o that needs to behave on powerup ; add application specific inits here clrw ; read display mode from eeprom at offset 0 call read_eeprom movwf bmode ; power up in last selected mode ; check to see how long since power was removed ; we use the fact that if power glitches for less than several seconds, ; the comparator input should be high still due to C1 storged charge. ; if its high, we bump to next display mode btfsc CMCON,6 ; sample comparator 1 output goto start_1 incf bmode,W ; bump lamp to next mode andlw b'00000011' ; modes 0..3 movwf bmode call write_eeprom0 ; save new mode start_1 ; reset voltage comparator for low battery detection ERRORLEVEL -306, -302 BSF STATUS,RP0 ; OPTION & TRIS & VRCON ARE IN BANK 1 ;need to set up internal vref here using VRCON movlw b'10000000'+14 ; vref enabled, vref not on RA2,high range movwf VRCON BCF STATUS,RP0 ; BACK TO LO REGS ERRORLEVEL +306, +302 call init_offtimer ; ====== MAIN ====== dispatch to correct light mode main jmptab movlw HIGH jmptab ; setup to index into jump table movwf PCLATH movf bmode,w andlw B'00000011' ; force to 0,1,2,3 for case addwf PCL,F ; jump into state table goto level_0 ; 0) off goto level_1 ; 1) dim goto level_2 ; 2) med goto level_3 ; 3) high jtabend if ((jmptab & 0xff00 ) != (jtabend & 0xff00)) error "Table must not cross page boundary - please movit!" endif ; --------------------------------------------------------------------- ; init_timer1 ; set up registers associated with timer1 so that TMR1IF in PIR1 gets ; set at the interval we require ( 69.4ms ) ; Sample timer calcs: ; XTAL_FREQ = 12mhz => .0000833 milliseconds period ; basic flash freq = 14.4hz => 69.4ms period ; .0000833ms * 4 * 8 = .0026656ms for 1 count of timer1 when using ; fosc/4 and prescaler of 8. ; we want a period of 69.4ms (72 flashes/min and 12 subsamples/flash) ; so the divider gets set to 69.4/.0026656 = 26035 ; --------------------------------------------------------------------- ; init_timer1 ; shut off the timer bcf T1CON,TMR1ON ; load the divider registers (clears prescaler counter) ; divider calcs... scaled to use integer math. ; to be totally correct, the preset value should be reduced ; by the time it takes to call this routine and get the timer ; restarted. In a polled environment detecting the TMR1IF is ; going to vary, so the actual time interval will wander slightly. base equ (XTAL_FREQ/4/8) divi equ (10 * base/144) divh equ (65536 - divi) >> 8 divl equ (65536 - divi) & 0x00ff movlw divh movwf TMR1H movlw divl movwf TMR1L ; clr the interrupt flag bcf PIR1,TMR1IF ; see page 50 of data sheet for definition of T1CON ; set timer 1 prescaler to /8 ; set timer 1 osc enable to off ; dont care on sync bit ; set timer 1 to use fosc/4 as input ; enable timer 1 movlw (1<