Finished project

Introduction construction-1 Construction-2 Construction-3 Calibration

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The Digital Capacitance Meter ( DCM ) circuit and PCB was designed by Laurier Gendron. It is being made available to hobbyists for personal development only. It cannot be used for commercial purposes of any kind without previous written permission. ( 6 Oct. 2000 )


While I was looking over some old electronic publications and I came across a design for a two digits capacitor meter using 555 i/c timers and my mind immediately flashed to a three digit counter design published in the Motorola data manual using their three digit decoder driver chip MC14553 .

As I studied the design I decided to explore the possibility of using simple available components to measure capacitance and came up with a simple design within reach of anyone at a fraction of the cost of a commercial unit.
You can make a search and download application data sheets for all the ICs used in this project from ON semiconductors

Circuit Description
As a reference you may wish to open up a new window to view the circuit while reading the description. Resize as required .

The three digits counter is made of CMOS ICs MC14553 and MC or CD14543 , three common cathode digital displays , three PNP transistors and current limiting resistors .

The Counter Display __ We need to know how the counter display operates in order to make use of it , the heart of the counter is the MC14553 which is a three-digit BCD counter and with the use of the MC14543 a BCD-to-seven segment decoder / driver will decode and activate the proper digit segments to display a maximum display count of 999.
To do this the MC14553 needs three input signals, a positive (high) pulse to the Latch input ( pin #10 ) to enable storage of pulses to be stored into the latch and a Reset ( pin # 13 ) pulse ( high ) to reset the counter . The total count desired is controlled by the Latch action which sets the time we require to insert the amount of pulses to the Counter ( pin #12) to be displayed.

When the latch is high the count starts and when the Latch is low (zero) the count is stopped and the total of pulses accumulated in the latch are displayed then a positive pulse is required to the Reset to clear the Latch , the speed of this process is controlled by an internal 100kHz oscillator which is determined by the .001 capacitor connected between pin # 3 and pin # 4 .

The Input Logic Circuit

In addition to the three digits counter circuit for display , the measurement of a capacitor can be achieved with only two additional CMOS ICs ,MC or CD4011 and MC or CD4049 , a rotary switch and a few resistors and capacitors.

The Oscillator__ Now that we know what controls the counter we use the Oscillator to measure the value of the unknown capacitor .
The oscillator is made of two of the six independent buffers of the MC4049 which is an HEX Inverting Buffer . Our test capacitor is connected between pin # 3 and # 4 and with the selection of one of the chosen resistors connected between pins # 2-6 and # 3 we have oscillation . The scaling fixed 1% resistors (10 meg , 1 meg ,100K , 1K ) were selected to produce a reading of " 010 " on all ranges except picofarad range .( see table )

The resulting square wave frequency from the test capacitor at pin # 4 is passed on to the next two buffers which are used as a current amplifier, the output of pin # 15 is then connected to pin # 13 of the first gate of MC4011 the action of which we will discuss in the pulse shaper section.

The Counter__ In the mean time the counter is always active and oscillating and its frequency is selected by the switching arrangement to coordinate with the range selected for the capacitor under test .
Exactly the same circuit arrangement is used except that the resistance in use could be one fixed resistance if we had capacitors of 1% accuracy but their price prohibit such luxury so we have to compensate by using adjustable resistances to calibrate the frequency to be fed to the counter for a reading that reflects the capacitor value under test .
The counter output is connected to pin # 12 of the first gate of MC4011 , it is a Quad NAND Gate . Both input must be high to get a low output , two low inputs give a high output and a low and high input gives us a high output. These conditions are used to form the Latch and Reset pulses that control the three-digit counter .

The Pulse Shaper__ As mentioned earlier MC4011 is used to shape the output of the oscillator pulses , from pin # 15 of the MC4049 capacitor C5 is used to couple and filter the square waves into triangle waves to one gate of MC4011 at pins # 1-2 , C6 is used to pass on the inverted pulses to pins # 5-6 of the following gate . Resistors R4 and R5 are used to pull down the square waves to sharp pulses used for the Latch and Reset .
As the oscillator counter puts out a constant stream of positive square waves to Pin # 12 of the 4011 the input at pin # 13 from the amplifier automatically interrupt the output count at pin # 11 allowing for the right number of pulses when correctly calibrated to be registered in the Latch .


The meter will measure capacitance from a low 10 picofarad (or lower if the wind is right ) to 10,000 uF in five ranges as follows ;

Select Range Test Display
Pico 1 pico to 999 picofarad (extended range ) *10 pico 010
.001 .001 to .099 uF (microfarad ) .01 010
.1 .1 to 9.99 uF ( Next show x10 when used ) .1 010
1.uF 1.uF to 99.9 uF ( x10 of previous range , optional ) 1.uF 010
10 uF 1.uF to 99.9 uF 10 uF 010
100 uF 100 uF to 9999 uF ( Optional with x10 switch ) 100 uF 010

Introduction construction-1 Construction-2 Construction-3 Calibration

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© Laurier Gendron, Burnaby, B.C., Canada. 1998